Samsung May Launch Physical AI Chiplet Platform Next Year

Samsung may launch a Physical AI chiplet platform next year in collaboration with Cadence. The platform could support applications like robotics, autonomous driving, and industrial automation. It is being developed using the Korean foundry’s SF5A (5nm) process technology.

Samsung and Cadence develop 5nm chiplet platform for Physical AI

In January 2026, Samsung and Cadence announced a partnership to develop a chiplet-based Physical AI semiconductor platform. Until now, the Korean firm has mainly produced and supplied custom single-chip solutions for individual fabless customers. However, the new platform can transform a range of semiconductor chips for Physical AI.

It looks like the project has now moved to the next stage of development. According to a report from ETNews, Samsung will tape out the Physical AI chiplet platform early next year. This means the company finalizes the chip design and sends it for manufacturing. After tape-out, mass production could take about six months. As a result, the new platform may launch in the second half of next year.

“Through this trusted partnership, we look forward to the successful expansion of the Chiplet Spec-to-Packaged-Parts ecosystem and helping customers accelerate reliable paths to cutting-edge silicon solutions for physical AI applications, including next-generation automotive designs,” a Samsung executive previously said.

Chiplets are important for Physical AI because conventional monolithic SoCs hit limits in routing density, thermal budgets, and reticle size. This technology addresses these problems by using separate functional blocks that engineers fabricate individually and then integrate at the package level.

For example, Chiplets offer heterogeneous integration, allowing engineers to combine best-in-class analog, digital, and AI compute solutions. More importantly, this is done without compromising the performance of each block. Furthermore, chiplets improve power efficiency as engineers can tailor voltage and frequency for each chiplet. They also improve yield and cost balance.

We will let you know if any new information regarding the Physical AI semiconductor platform surfaces on the web.